Not a vast amount of noteworthy progress to report today, but then I suppose some days are just 'chug-along' periods where you grind through some necessary work without either making any startling discoveries or hitting any major flaws. Today was one of those days, in which I finished changing all the Byte references to Int, and then going through all the core code to eliminate casts and make sure the compiler was happy with all my type-related activity.
By the end of the coding session, I'd got back to the point where the VIC-20 ROM was being executed all the way through until it hit the ADC instruction I was working on before. I'd also added a new method to the MemoryMap class, to give me back a two-byte value as a 16-bit address in one call. This really helps with instructions that use addresses (or indirect addresses) as operands, because now the core issues just one call to MemoryMap to get the value instead of issuing two and then combining them. Back in the early 80's I was enough of a nerd that I'd avidly read the lists of BASIC keywords each microcomputer offered to see what they could do, and was always impressed with any version that offered double-byte PEEK and POKE commands (often named DEEK and DOKE). So, as a little homage, MemoryMaps' new double-byte address method is named DEEK.
One little oddity - I said previously that I was implementing instructions as the ROM presented them, so that each time I executed the emulator it would get a little bit further before finding another unimplemented instruction for me to work on. Logically, therefore, as I went through all the existing instructions I'd already covered, making changes for the Byte/Int switchover and DEEK, I should end up with all the instructions using the new code. So why do I have one instruction left over, still commented-out? It exists because the ROM must have presented it as needing implementing in the core, but hasn't been re-presented since I commented all the instructions out and reworked them.
That sort of implies that the core is following a slightly different path through the ROM now, which means either I had a bug before, or I have one now. Given that the decode logic is basically new code, using Ints and double-byte routines where previously it was all Bytes and combinations, the bug could easily be in the new version, or could have been in the old code which is now history. Tomorrow I'm going to do a scan over the ROM and see if this anomalous opcode exists in the code path or not - if it does, I'm missing it now and that's bad. If it doesn't, it means the old code incorrectly decoded an operand byte as an opcode and now we don't do that, which is good.
I'll also come back to ADC tomorrow, which was giving me a real headache with the old code mechanisms, and in particular the logic to set the Overflow (V) Flag is a complicated little problem that I wasn't happy with my solution to. So we'll start again, and see how it works out. I'll leave you with a list of the instructions/modes that the emulator supports as of now, just so we can measure progress later when I start slacking. Stay tuned!
By the end of the coding session, I'd got back to the point where the VIC-20 ROM was being executed all the way through until it hit the ADC instruction I was working on before. I'd also added a new method to the MemoryMap class, to give me back a two-byte value as a 16-bit address in one call. This really helps with instructions that use addresses (or indirect addresses) as operands, because now the core issues just one call to MemoryMap to get the value instead of issuing two and then combining them. Back in the early 80's I was enough of a nerd that I'd avidly read the lists of BASIC keywords each microcomputer offered to see what they could do, and was always impressed with any version that offered double-byte PEEK and POKE commands (often named DEEK and DOKE). So, as a little homage, MemoryMaps' new double-byte address method is named DEEK.
One little oddity - I said previously that I was implementing instructions as the ROM presented them, so that each time I executed the emulator it would get a little bit further before finding another unimplemented instruction for me to work on. Logically, therefore, as I went through all the existing instructions I'd already covered, making changes for the Byte/Int switchover and DEEK, I should end up with all the instructions using the new code. So why do I have one instruction left over, still commented-out? It exists because the ROM must have presented it as needing implementing in the core, but hasn't been re-presented since I commented all the instructions out and reworked them.
That sort of implies that the core is following a slightly different path through the ROM now, which means either I had a bug before, or I have one now. Given that the decode logic is basically new code, using Ints and double-byte routines where previously it was all Bytes and combinations, the bug could easily be in the new version, or could have been in the old code which is now history. Tomorrow I'm going to do a scan over the ROM and see if this anomalous opcode exists in the code path or not - if it does, I'm missing it now and that's bad. If it doesn't, it means the old code incorrectly decoded an operand byte as an opcode and now we don't do that, which is good.
I'll also come back to ADC tomorrow, which was giving me a real headache with the old code mechanisms, and in particular the logic to set the Overflow (V) Flag is a complicated little problem that I wasn't happy with my solution to. So we'll start again, and see how it works out. I'll leave you with a list of the instructions/modes that the emulator supports as of now, just so we can measure progress later when I start slacking. Stay tuned!
- ADC Immediate
- AND Immediate
- ASL Accumulator
- BCC Relative
- BCS Relative
- BEQ Relative
- BNE Relative
- BPL Relative
- CLC Implied
- CLD Implied
- CMP Absolute,X
- CMP Immediate
- CMP Indirect Indexed,Y
- CPX Immediate
- CPY Immediate
- DEX Implied
- DEY Implied
- INC Absolute,X
- INX Implied
- INC Zero Page
- JMP Absolute
- JMP Indirect
- JSR Absolute
- LDA Absolute
- LDA Absolute,X
- LDA Absolute,Y
- LDA Immediate
- LDA Indirect Indexed,Y
- LDA Zero Page
- LDX Immediate
- LDX Zero Page
- LDY Immediate
- LDY Zero Page
- ORA Absolute
- ORA Immediate
- ROR Accumulator
- RTS Implied
- SEI Implied
- STA Absolute
- STA Absolute,X
- STA Absolute,Y
- STA Indirect Indexed,Y
- STA Zero Page
- STA Zero Page,X
- STX Absolute
- STX Zero Page
- STY Absolute
- STY Zero Page
- STY Zero Page,X
- TAX Implied
- TAY Implied
- TXA Implied
- TXS Implied
- TYA Implied
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1 comments:
Really interesting stuff. Any chance of an early PEEK, or DEEK, at the source code? I do a little coding in C# and would be fascinated to see how someone goes about implementing one of the classic CPUs in managed code.
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